The present invention is directed to integrated circuits and their processing for the manufacture of semiconductor devices. More particularly, the invention provides a method and system for automated defect diction for the manufacture of integrated circuits. Merely by way of example, the invention has been applied to detecting defects using non-parametric statistical tools for the manufacturing of integrated circuits. But it would be recognized that the invention has a much broader range of applicability. For example, the invention can be applied to detecting defects in other manufacturing processes.
Integrated circuits or “ICs” have evolved from a handful of interconnected devices fabricated on a single chip of silicon to millions of devices. Current ICs provide performance and complexity far beyond what was originally imagined. In order to achieve improvements in complexity and circuit density (i.e., the number of devices capable of being packed onto a given chip area), the size of the smallest device feature, also known as the device “geometry”, has become smaller with each generation of ICs. Semiconductor devices are now being fabricated with features less than a quarter of a micron across.
Increasing circuit density has not only improved the complexity and performance of ICs but has also provided lower cost parts to the consumer. An IC fabrication facility can cost hundreds of millions, or even billions, of dollars. Each fabrication facility will have a certain throughput of wafers, and each wafer will have a certain number of ICs on it. Therefore, by making the individual devices of an IC smaller, more devices may be fabricated on each wafer, thus increasing the output of the fabrication facility. Making devices smaller is very challenging, as each process used in IC fabrication has a limit. That is to say, a given process typically only works down to a certain feature size, and then either the process or the device layout needs to be changed. An example of such a limit is defects detection tools used for the manufacture of integrated circuits in a cost effective and efficient way.
Fabrication of custom integrated circuits using chip foundry services has evolved over the years. Fabless chip companies often design the custom integrated circuits. Such custom integrated circuits require a set of custom masks commonly called “reticles” to be manufactured. A chip foundry company called Semiconductor International Manufacturing Company (SMIC) of Shanghai, China is an example of a chip company that performs foundry services. Although fabless chip companies and foundry services have increased through the years, many limitations still exist. For example, tools for detecting defects during the manufacturing process have are often inadequate.
Typically, the manufacturing of integrated circuits involves many processing steps and processing tools. Due to costs and other practical considerations, integrated circuits (or rather partially processed integrated circuits) are not tested at every processing step. As a result, it is often difficult to isolate and identify the sources of manufacturing defects. In the past, various techniques (e.g., statistical tool implemented with parametric models, etc.) have been used to isolate and identify sources of manufacturing devices. Unfortunately, these techniques are often inadequate.
From the above, it is seen that an improved technique for determining sources of semiconductor manufacturing defects.